Engineering Group, Engineering Group > ASICS Engineering
As a Coherent Fabric Micro-architect/Design Engineer, you will work with chip architects to conceive of the micro-architecture and deliver RTL design for a coherent interconnect. You will also help with architecture/product definition of the SoC through early involvement in the product life-cycle.
Roles and Responsibilities:
Work with chip architect to understand architecture concept and high level requirements
Develop the micro-architecture and write design specifications for a coherent fabric including the home node, snoop filter, caches, IO bridges, etc.
Convert design spec to Verilog RTL
Support the verification team to devise appropriate test plans and verification strategy
Collaborate with physical design team to close timing, area targets, reliability, etc.
The ideal candidate will at least have the following:
BA/BS degree in Electrical Engineering with 5+ years of practical experience
Strong fundamentals in digital ASIC design; experience using Verilog or VHDL
Experience with ASIC design/micro-architecture, synthesis, timing/power analysis
5+ years of practical experience with implementation coherent fabric/protocols for scalable, multi-core SOCs
MS degree in Electrical Engineering; 10 years of practical experience
Expertise in implementation of snoop filter or directory based coherent fabrics
Expertise in the design of coherent, high speed cache controllers
Expertise in coherent IO protocols like CCIX and CXL
Strong understanding of ordering rules in a multi-core system
Strong understanding of fabric topologies and related performance issues
Experience with multi-socket coherency protocols like GMI (Infinity Fabric), QPI/UPI, CCIX, etc. is a plus.
Expertise in CHI and other AMBA protocols is a plus
Familiarity with high performance and low power design techniques
Some experience in design verification and/or physical design is a plus
Frequently transports between offices, buildings, and campuses up to ½ mile.
Frequently transports and installs equipment up to 5 lbs.
Performs required tasks at various heights (e.g., standing or sitting).
Monitors and utilizes computers and test equipment for more than 6 hours a day.
Continuous communication which includes the comprehension of information with colleagues, customers, and vendors both in person and remotely.
Bachelors - Engineering, Bachelors - Science
5+ years ASIC design, verification, or related work experience.
1+ years of work experience in a role requiring interaction with senior leadership (e.g., Director level and above). ,2+ years experience with design verification methods. ,2+ years experience with scripting tools and programming languages. ,8+ years ASIC design, verification, or related work experience. ,2+ years experience with architecture and design tools.
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